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SR Lite v6.2 PCB - OOPS
OOPS!
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I used 100 mils as the pin spacing of the SOIC chip. Too many years with DIP chips. Probably exactly a factor of 2 too big. Sorry David K0IMH -----Original Message-----
From: <softrock40@groups.io> Sent: Dec 5, 2024 4:39 PM To: <softrock40@groups.io>, <softrock40@groups.io> Subject: Re: [softrock40] SR Lite v6.2 PCB Christopher, I used the picture off the back of the board from stage 3 of the assembly instructions( divider) Scaling from the chip pad spacing with 8 pads I get board width 2.99 inch in the dimension where I can measure it well, and 3.03 inch in the dimension where there are only 4 pads and the photo may be a little tilted. At this stage of assembly the pictures show most of the traces. Regards David Underwood K0IMH -----Original Message----- From: Sent: Dec 4, 2024 5:14 PM To: Subject: Re: [softrock40] SR Lite v6.2 PCB Thanks -- I have another set of board photos, and that is exactly what I figured that I would have to do, but I was just hoping that there was an easier way.. LOL 73 de -- Chris AD2CS *GCARC Education Committee Chair* *GCARC Membership Committee Chair* *Member, GCARC Board of Directors* ------------------------------------------------------------ Christopher P Prioli 648 W Holly Ave Pitman, NJ 08071 1-856-689-6783 www.ad2cs.com On Wed, Dec 4, 2024 at 6:06 PM Roland Turner via groups.io wrote: The photos on this page |
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