Re: Pitfalls of measuring components with the NanoVNA #measurement


 

This next post is about measuring inductors and self-resonance. I have an old multi-layer choke in my junk box and I measured it with the NanoVNA. My goal is to post some graphs of the results and explain some of the observations and pitfalls for those new to measuring components with the NanoVNA. For larger components I use a double banana jack to BNC test jig. I find it works fairly well but the effects of parasitic capacitance/inductance and impedance bumps limits it to about 60 MHz. A photo is attached which shows the configuration and how the cal loads are constructed. The cal loads are made from double sided FR4 PCB stock with conductive adhesive copper foil used to connect the top and bottom layers. The foil is also soldered in a few places. A 49.9 ohm 0805 SMD resistor is used for the 50 ohm load.

To show how well this jig works I have attached a measurement of a 1K SMD resistor soldered to one of these test boards. The measurement is within 12 ohms which is quite good considering the magnitude of the reflection coefficient is very close to 1.

A photo is attached of the inductor used and includes a simplified model of a typical inductor . I measured it with a DE-5000 LCR meter and at 100 kHz. it was 653 uH with a series resistance of 23 Ohms. The NanoVNA measured 660 uH and 23 which is very close.

A series of graphs are attached. Self capacitance due to the multi-layer winding results in self resonant frequency of 4.627 MHz. At this point the inductance and capacitance of this parallel resonant circuit cancel out and we see a high resistance measured by the NanoVNA. The NanoVNA is not very accurate at measuring resistances beyond 1 or 2K so we cannot rely on the actual number (we only know that its large). If we want to get a better estimate we can use the S21 series method but that is a topic unto itself.

From the graph one might assume that the inductance is changing as we approach resonance. This is not the case and is due to the way the software calculates inductance using L = X/(2*pi*freq). X is increasing at a faster rate than L alone because of the parallel capacitance in the circuit. Some authors refer to this as "apparent inductance" as opposed to "actual inductance" and there are methods to calculate the actual inductance vs frequency.

The last two graphs show "S11 phase" (or reflection coefficient phase) and "impedance phase" versus frequency. There was some interest in previous posts on this topic so I have plotted both for comparison. The impedance phase was calculated by exporting a s11 Touchstone file to a spreadsheet where it could be calculated and plotted. Note that both have zero phase at resonance but are completely different at other frequencies. Roger

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